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| Order this document by SG3525A/D Pulse Width Modulator Control Circuits The SG3525A, SG3527A pulse width modulator control circuits offer improved performance and lower external parts count when implemented for controlling all types of switching power supplies. The on-chip +5.1 V reference is trimmed to 1% and the error amplifier has an input common-mode voltage range that includes the reference voltage, thus eliminating the need for external divider resistors. A sync input to the oscillator enables multiple units to be slaved or a single unit to be synchronized to an external system clock. A wide range of deadtime can be programmed by a single resistor connected between the CT and Discharge pins. These devices also feature built-in soft-start circuitry, requiring only an external timing capacitor. A shutdown pin controls both the soft-start circuitry and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft-start recycle with longer shutdown commands. The under voltage lockout inhibits the outputs and the changing of the soft-start capacitor when VCC is below nominal. The output stages are totem-pole design capable of sinking and sourcing in excess of 200 mA. The output stage of the SG3525A features NOR logic resulting in a low output for an off-state while the SG3527A utilized OR logic which gives a high output when off. * 8.0 V to 35 V Operation SG3525A SG3527A PULSE WIDTH MODULATOR CONTROL CIRCUITS SEMICONDUCTOR TECHNICAL DATA 16 1 N SUFFIX PLASTIC PACKAGE CASE 648 * * * * * * * * 5.1 V 1.0% Trimmed Reference 100 Hz to 400 kHz Oscillator Range Separate Oscillator Sync Pin Adjustable Deadtime Control Input Undervoltage Lockout Latching PWM to Prevent Multiple Pulses Pulse-by-Pulse Shutdown Dual Source/Sink Outputs: 400 mA Peak 16 1 DW SUFFIX PLASTIC PACKAGE CASE 751B (SO-16L) PIN CONNECTIONS Inv. Input Noninv. Input Sync OSC. Output 1 2 3 4 5 6 7 8 (Top View) 16 Vref 15 VCC 14 Output B 13 VC 12 Ground 11 Output A 10 Shutdown 9 Compensation Representative Block Diagram CT 16 Vref 15 VCC 12 Ground OSC Output Sync RT CT Discharge Compensation INV. Input 2 Noninv. Input 8 CSoft-Start 10 Shutdown 5.0k Output B 5.0k OR 14 4 3 6 5 7 R 9 1 - Error Amp + + - PWM - 50A VREF S Latch S OR SG3525A Output Stage 13 VC Output A 11 Oscillator F/F Q Q NOR 14 Output B Reference Regulator To Internal Circuitry Under- Voltage Lockout NOR VC 13 Output A 11 RT Discharge Soft-Start ORDERING INFORMATION Device SG3525AN SG3525ADW TA = 0 to +70C Operating Temperature Range Package Plastic DIP SO-16L Plastic DIP Rev 2 SG3527A Output Stage SG3527AN (c) Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA 1 SG3525A SG3527A MAXIMUM RATINGS (Note 1) Rating Supply Voltage Collector Supply Voltage Logic Inputs Analog Inputs Output Current, Source or Sink Reference Output Current Oscillator Charging Current Power Dissipation (Plastic & Ceramic Package) TA = +25C (Note 2) TC = +25C (Note 3) Thermal Resistance Junction-to-Air Thermal Resistance Junction-to-Case Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 seconds) PD 1000 2000 RJA RJC TJ Tstg TSolder 100 60 +150 -55 to +125 +300 C/W C/W C C C IO Iref Symbol VCC VC Value +40 +40 -0.3 to +5.5 -0.3 to VCC 500 50 5.0 Unit Vdc Vdc V V mA mA mA mW NOTES: 1. Values beyond which damage may occur. 2. Derate at 10 mW/C for ambient temperatures above +50C. 3. Derate at 16 mW/C for case temperatures above +25C. RECOMMENDED OPERATING CONDITIONS Characteristics Supply Voltage Collector Supply Voltage Output Sink/Source Current (Steady State) (Peak) Reference Load Current Oscillator Frequency Range Oscillator Timing Resistor Oscillator Timing Capacitor Deadtime Resistor Range Operating Ambient Temperature Range Symbol VCC VC IO 0 0 Iref fosc RT CT RD TA 0 0.1 2.0 0.001 0 0 Min 8.0 4.5 Max 35 35 100 400 20 400 150 0.2 500 +70 mA kHz k F C Unit Vdc Vdc mA APPLICATION INFORMATION Shutdown Options (See Block diagram, front page) Since both the compensation and soft-start terminals (Pins 9 and 8) have current source pull-ups, either can readily accept a pull-down signal which only has to sink a maximum of 100 A to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins. An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance the available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions: the PWM latch is immediately set providing the fastest turn-off signal to the outputs; and a 150 A current sink begins to discharge the external soft-start capacitor. If the shutdown command is short, the PWM signal is terminated without significant discharge of the soft-start capacitor, thus, allowing, for example, a convenient implementation of pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, will ultimately discharge this external capacitor, recycling slow turn-on upon release. Pin 10 should not be left floating as noise pickup could conceivably interrupt normal operation. 2 MOTOROLA ANALOG IC DEVICE DATA SG3525A SG3527A ELECTRICAL CHARACTERISTICS (VCC = +20 Vdc, TA = Tlow to Thigh [Note 4], unless otherwise noted.) Characteristics REFERENCE SECTION Reference Output Voltage (TJ = +25C) Line Regulation (+8.0 V VCC +35 V) Load Regulation (0 mA IL 20 mA) Temperature Stability Total Output Variation Includes Line and Load Regulation over Temperature Short Circuit Current (Vref = 0 V, TJ = +25C) Output Noise Voltage (10 Hz f 10 kHz, TJ = +25C) Long Term Stability (TJ = +125C) (Note 5) OSCILLATOR SECTION (Note 6, unless otherwise noted.) Initial Accuracy (TJ = +25C) Frequency Stability with Voltage (+8.0 V VCC +35 V) Frequency Stability with Temperature Minimum Frequency (RT = 150 k, CT = 0.2 F) Maximum Frequency (RT = 2.0 k, CT = 1.0 nF) Current Mirror (IRT = 2.0 mA) Clock Amplitude Clock Width (TJ = +25C) Sync Threshold Sync Input Current (Sync Voltage = +3.5 V) ERROR AMPLIFIER SECTION (VCM = +5.1 V) Input Offset Voltage Input Bias Current Input Offset Current DC Open Loop Gain (RL 10 M) Low Level Output Voltage High Level Output Voltage Common Mode Rejection Ratio (+1.5 V VCM +5.2 V) Power Supply Rejection Ratio (+8.0 V VCC +35 V) PWM COMPARATOR SECTION Minimum Duty Cycle Maximum Duty Cycle Input Threshold, Zero Duty Cycle (Note 6) Input Threshold, Maximum Duty Cycle (Note 6) Input Bias Current DCmin DCmax Vth Vth IIB - 45 0.6 - - - 49 0.9 3.3 0.05 0 - - 3.6 1.0 % % V V A VIO IIB IIO AVOL VOL VOH CMRR PSRR - - - 60 - 3.8 60 50 2.0 1.0 - 75 0.2 5.6 75 60 10 10 1.0 - 0.5 - - - mV A A dB V V dB dB fosc D VCC fosc DT fmin fmax - - 2.0 1.0 0.3 6.0 2.0 % % Vref Regline Regload Vref/T Vref ISC Vn S 5.00 - - - 4.95 - - - 5.10 10 20 20 - 80 40 20 5.20 20 50 - 5.25 100 200 50 Vdc mV mV mV Vdc mA Vrms mV/khr Symbol Min Typ Max Unit - - % - 400 1.7 3.0 0.3 1.2 - 50 - 2.0 3.5 0.5 2.0 1.0 - - 2.2 - 1.0 2.8 2.5 Hz kHz mA V s V mA NOTES: 4. Tlow = 0 for SG3525A, 3527A Thigh = +70C for SG3525A, 3527A 5. Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 6. Tested at fosc = 40 kHz (RT = 3.6 k, CT = 0.01 F, RD = 0). MOTOROLA ANALOG IC DEVICE DATA 3 SG3525A SG3527A ELECTRICAL CHARACTERISTICS (Continued) Characteristics SOFT-START SECTION Soft-Start Current (Vshutdown = 0 V) Soft-Start Voltage (Vshutdown = 2.0 V) Shutdown Input Current (Vshutdown = 2.5 V) OUTPUT DRIVERS (Each Output, VCC = +20 V) Output Low Level (Isink = 20 mA) (Isink = 100 mA) Output High Level (Isource = 20 mA) (Isource = 100 mA) Under Voltage Lockout (V8 and V9 = High) Collector Leakage, VC = +35 V (Note 7) Rise Time (CL = 1.0 nF, TJ = 25C) Fall Time (CL = 1.0 nF, TJ = 25C) Shutdown Delay (VDS = +3.0 V, CS = 0, TJ = +25C) Supply Current (VCC = +35 V) NOTE: 7. Applies to SG3525A only, due to polarity of output pulses. Symbol Min Typ Max Unit A V mA 25 - - 50 0.4 0.4 80 0.6 1.0 VOL - - VOH 18 17 VUL IC(leak) tr tf tds ICC 6.0 - - - - - 19 18 7.0 - 100 50 0.2 14 - - 8.0 200 600 300 0.5 20 0.2 1.0 0.4 2.0 V V V A ns ns s mA Lab Test Fixture Vref Clock 0.1 16 Reference Regulator Flip/ Flop O s c i l l a t o r 15 0.1 VCC VC 0.1 Out A 4 3.0k PWM ADJ. Sync 3 1.0k RT 6 Deadtime 1.5k 0.009 Ramp 100 0.1 0.001 Comp 10k 1 = VIO 2 = 1(+) 3 = 1(-) 1 2 - V/I Meter + 3 1 2 3 1 2 3 DUT 0.01 9 7 5 13 A 11 1.0k, 1.0W (2) B 14 Out B PWM 50A 12 Gnd Softstart + 5.0F 1 2 3 1 2 - E/A + 5.0k 5.0k 8 10 2.0k Shutdown Vref 4 MOTOROLA ANALOG IC DEVICE DATA SG3525A SG3527A Figure 1. Oscillator Charge Time versus RT 200 100 RT, TIMING RESISTOR (k ) 50 20 10 6 5 RT * RD = 0 Figure 2. Oscillator Discharge Time versus RD 500 R D , DEAD TIME RESISTOR ( ) 400 300 200 100 0 5.0 2.0 2.0 5.0 10 20 50 RD * CT 7 100 200 500 1000 2000 5000 10,000 CHARGE TIME (s) 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 DISCHARGE TIME (s) Figure 3. Error Amplifier Open Loop Frequency Response 1 2 - + 9 Figure 4. Output Saturation Characteristics (SG3525A) V sat , SATURATION VOLTAGE (V) A VOL, VOLTAGE GAIN (dB) 100 80 60 40 20 0 -20 1.0 10 100 1.0 k 10 k 100 k 1.0 M RZ = 20 k CP RZ 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0.01 VCC = +20 V TJ = +25C Source Sat, (VC-VOH) Sink Sat, (VOL) 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1.0 IO, OUTPUT SOURCE OR SINK CURRENT (A) 10 M f, FREQUENCY (Hz) Figure 5. Oscillator Schematic (SG3525A) Vref 16 Q1 RT CT Q5 Q8 7.4k 6 5 Q3 Q6 Q9 2.0k Q10 Ramp To PWM 25k Blanking Q14 To Output Figure 6. Error Amplifier Schematic (SG3525A) 15 VCC Q3 14k Q11 3 Sync 7 Discharge Q2 12 Gnd 2.0k 5.0pF Q4 Q7 1.0k 400A 23k Inverting Q1 Input 1 Noninverting Input 2 200A Q4 Q2 To PWM Comparator 100A 5.8V 30 9 Compensation 1.0k Q12 Q13 3.0k 250 4 OSC Output MOTOROLA ANALOG IC DEVICE DATA 5 SG3525A SG3527A Figure 7. SG3525A Output Circuit (1/2 Circuit Shown) VCC Q5 Q7 Q9 Q4 Vref Q6 2.0k Q1 Q2 Q3 Q6 Omitted in SG3527A Q10 5.0k Q8 11, 14 Q11 Output 13 VC 5.0k Clock F/F 10k 10k PWM Figure 8. Single-Ended Supply Q1 +Vsupply R1 R2 13 VC SG3525A B Gnd 12 A 11 14 To Output Filter Figure 9. Push-Pull Configuration +Vsupply R1 13 VC A SG3525A 14 Gnd B R3 Q2 11 Q1 R2 C2 C1 T1 12 For single-ended supplies, the driver outputs are grounded. The VC terminal is switched to ground by the totem-pole source transistors on alternate oscillator cycles. In conventional push-pull bipolar designs, forward base drive is controlled by R1-R3. Rapid turn-off times for the power devices are achieved with speed-up capacitors C1 and C2. Figure 10. Driving Power FETS +Vsupply Figure 11. Driving Transformers in a Half-Bridge Configuration +Vsupply Q1 T1 T1 13 VC A SG3525A 11 R1 Q2 14 C2 R2 T2 C1 R1 13 VC A Q1 11 SG3525A Gnd B 12 14 Q2 Gnd B 12 The low source impedance of the output drivers provides rapid charging of power FET input capacitance while minimizing external components. Low power transformers can be driven directly by the SG3525A. Automatic reset occurs during deadtime, when both ends of the primary winding are switched to ground. 6 MOTOROLA ANALOG IC DEVICE DATA SG3525A SG3527A OUTLINE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE R -A- 16 9 B 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 F S C L -T- H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M -A- DW SUFFIX PLASTIC PACKAGE CASE 751B-05 (SO-16L) ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 9 -B- 1 8 P 8 PL 0.25 (0.010) M B S G F K C -T- SEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S DIM A B C D F G J K M P R MOTOROLA ANALOG IC DEVICE DATA 7 SG3525A SG3527A Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 8 *SG3525A/D* MOTOROLA ANALOG IC DEVICE DATA SG3525A/D |
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